rt9301 1 ds9301-05 april 2011 www.richtek.com 3-channel low dropout rgb led driver ordering information (top view) tsot-23-8 pin configurations general description the rt9301 is a 3-channel current source driver for rgb led. it is easy to be designed in applications that need mixing rgb light source for multi-color output. the rt9301 also provide users with great flexibility and device performance. it uses externals resistor to set the bias current for three leds, which are matched to 5%(max.). users can adjust the output current from 2ma to 50ma by setting the iset resistor. the rt9301 features very low dropout and under voltage lockout protection. it is available in a space-saving tsot-23-8 and wdfn-8l 3x3 packages. features z z z z z input voltage range : 2.8v to 5.5v z z z z z low 60/45mv dropout at 20/15ma z z z z z individual current setting by external resistor z z z z z individual on/off control by baseband mpu z z z z z up to 50ma led bias current z z z z z simple led brightness control z z z z z 5%(max.) led current matching z z z z z low 0.1ua shutdown current z z z z z uvlo protection z z z z z rohs compliant and 100% lead (pb)-free applications z mobile phone, smart phone multi-color led backlight z camera flash white led z lcd display modules z keypad backlight marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area. note : z wdfn-8l 3x3 is in w-type z richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. led2 iset2 led1 led3 gnd vin iset3 iset1 7 6 5 1 2 3 4 8 gnd 9 wdfn-8l 3x3 led3 vin iset3 led2 iset1 iset2 gnd led1 5 34 6 8 2 7 rt9301 package type j8 : tsot-23-8 qw : wdfn-8l 3x3 (green only) lead plating system p : pb free g : green (halogen free and pb free)
rt9301 2 ds9301-05 april 2011 www.richtek.com typical application circuit 3 ~ set1 3 ~ 1 set 3 ~ set1 3 ~ led1 r 0.9v v x 800 i x 800 i - = = led3 led2 led1 gnd iset1 v bat vin iset3 iset2 r set3 r set2 gpio rt9301 r set1 1uf v bat 1uf led3 led2 led1 iset1 vin iset3 iset2 rt9301 r set3 r set2 r set1 gpio gnd figure 2. application circuit for backlight figure 3. application circuit for keypad gpio (v) i led (ma) r set (k w ) nearest standard values for r set (k w ) 15 48 47.5 1.8 20 36 36 15 101 100 2.8 20 76 75 led3 led2 led1 gnd iset1 v bat vin iset3 iset2 r set3 r set2 r set1 on off gpio rt9301 v set1 v set2 v set3 1uf figure 1. application circuit for rgb led
rt9301 3 ds9301-05 april 2011 www.richtek.com function block diagram functional pin description pin no. pin name pin function rt9301 j8 rt9301gqw 1 8 led3 rgb or white led cathode connection pin. 2ma to 50ma current flows into led. floating or connection to ground is used to disable this pin. 2 7, exposed pad (9) gnd ground pin. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 3 6 vin power input pin. 4 5 iset3 current setting for led3. connect to gnd if not use. 5 4 iset2 current setting for led2. connect to gnd if not use. 6 3 iset1 current setting for led1. connect to gnd if not use. 7 2 led1 rgb or white led cathode connection pin. 2ma to 50ma current flows into led. floating or connection to ground is used to disable this pin. 8 1 led2 rgb or white led cathode connection pin. 2ma to 50ma current flows into led. floating or connection to ground is used to disable this pin. current source uvlo vin gnd led1 led2 led3 + - v ref + - v ref iset1 iset2 iset3 + - v ref
rt9301 4 ds9301-05 april 2011 www.richtek.com note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. q ja is measured in the natural convection at t a = 25 c on a low effective single layer thermal conductivity test board of jedec 51-3 thermal measurement standard. the case point of q jc is on the expose pad for the wdfn package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. electrical characteristics parameter symbol test conditions min typ max unit input supply voltage v in 2.8 -- 5.5 v uvlo threshold v uvlo_l falling 2 2.2 2.4 v uvlo hysteresis -- 100 -- mv dropout voltage v led 90% of i led = 16ma -- 40 120 mv iset reference voltage 0.8 0.9 1 v quiescent current i q led open, i set = 20 ua -- 0.5 1 ma i led matching i led = 16ma - 5 -- +5 % i led accuracy i led i led = 16ma - 5 -- +5 % shutdown current all v set1~3 < 0.25v -- 0.1 2 m a v set enable threshold v set v set connect r set = 47k w to i set 1.3 -- -- v v set disable threshold v il v set connect r set = 47k w to i set -- -- 0.25 v (v in = 3.6v, t a = 25 c, unless otherwise specification) absolute maximum ratings (note 1) l supply input voltage------------------------------------------------------------------------------------------------ - 0.3v to 6v l led1,2,3 pin voltage----------------------------------------------------------------------------------------------- - 0.3v to v in + 0.3v l other i/o pin voltages---------------------------------------------------------------------------------------------- - 0.3v to 6v l power dissipation, p d @ t a = 25 c tsot-23-8-------------------------------------------------------------------------------------------------------------0.382w wdfn-8l 3x3---------------------------------------------------------------------------------------------------------0.926w l package thermal resistance (note 2) tsot-23-8, q ja -------------------------------------------------------------------------------------------------------262 c/w wdfn-8l 3x3, q ja ---------------------------------------------------------------------------------------------------108 c/w wdfn-8l 3x3, q jc ---------------------------------------------------------------------------------------------------8.2 c/w l lead temperature (soldering, 10 sec.)--------------------------------------------------------------------------260 c l junction temperature-----------------------------------------------------------------------------------------------150 c l storage temperature range--------------------------------------------------------------------------------------- - 65 c to 150 c l esd susceptibility (note 3) hbm (human body mode)-----------------------------------------------------------------------------------------2kv mm (machine mode)------------------------------------------------------------------------------------------------200v recommended operating conditions (note 4) l junction temperature range-------------------------------------------------------------------------------------- - 40 c to 125 c l ambient temperature range-------------------------------------------------------------------------------------- - 40 c to 85 c
rt9301 5 ds9301-05 april 2011 www.richtek.com typical operating characteristics led current vs. input voltage 0 5 10 15 20 25 2 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) led current (ma) led1 led2 led3 led current vs. v set 0 10 20 30 40 50 60 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 v set (v) led current (ma) r set = 36k r set = 51k r set = 75k r set = 160k r set = 360k led current vs. temperature 19.7 19.8 19.9 20 20.1 20.2 20.3 20.4 -40 -25 -10 5 20 35 50 65 80 95 temperature led current (ma) i led = 20ma ( c) dimming operation time (100 s/div) v set i led (1v/div) (10ma/div) v bat = 5.0v enable & shutdown response time (50 s/div) (1v/div) (10ma/div) v set i led v bat = 5.0v line transient response time (50 s/div) (1v/div) (10ma/div) v in i led v bat = 3.7v to 4.2v, i led = 20ma v f1 = 3.02v, v f2 = 3.06v, v f3 = 3.17v
rt9301 6 ds9301-05 april 2011 www.richtek.com applications information the rt9301 is a 3-channel current source driver for rgb led or white leds. the output current can be controlled from 2ma to 50ma by adjusting the setting current from external. it is easy to support a multi-color rgb led. input uvlo the input operating voltage range of the rt9301 is 2.8v to 5.5v. an input capacitor at the vin pin could reduce ripple voltage. it is recommended to use a ceramic 1uf or larger capacitance as the input capacitor. this ic provides an under voltage lockout (uvlo) function to prevent it from unstable issue when startup. the uvlo threshold of input falling voltage is set at 2.1v typically with a hysteresis 0.1v. output current setting the led current is setting by the current of iset pin. the led current of the three channels (led1, led2, led3) could be set from the iset (iset1, iset2, iset3) pins individually. the typical application circuit shows as figure 1. figure 1. typical application circuit the led current can be controlled from an external voltage (v set ) and a resistor (r set ) between vset and iset pin. the voltage range of v set is from 1.3v to 5.5v. the internal reference voltage at iset pin is 0.9v typically. led current is set as 800 times the current flowing into iset pin. therefore, the led current can be calculated as the following equation. led3 led2 led1 gnd iset1 v bat vin iset3 iset2 r set3 r set2 r set1 rt9301 v set1 v set2 v set3 1uf 3 ~ set1 3 ~ set1 3 ~ set1 3 ~ led1 r 0.9v - v x 800 i x 800 i = = for example, r set1 = 45k w and v set1 = 1.8v, the current of led1 is equal to 16ma. the led current of each channel can be controlled from 2ma to 50ma. it is easy to obtain a multi-color output by changing the current of iset1, iset2, and iset3 respectively. figure 2 shows the characteristics of i led vs. v set . if the r set is selected, the led current could be controlled from v set . the voltage of vset must be higher than 1.3v to enable the led. for low led current application, it is recommended to use a higher resistance on rset (for example: r set = 360k w ). to disable the led current, the iset pin should be connected to ground or floating. for one led or two leds application, the unused iset pin should be connected to gnd. in addition, don t short v setx to isetx pin. figure 2. led current setting figure 3. application circuit for two leds led3 led2 led1 gnd iset1 v bat vin iset3 iset2 r set2 r set1 rt9301 v set1 v set2 1uf 0 10 20 30 40 50 60 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 v set (v) led current (ma) r set = 36k r set = 51k r set = 75k r set = 160k r set = 360k
rt9301 7 ds9301-05 april 2011 www.richtek.com gpio control figure 4 shows an application circuit for backlight with gpio. the three setting resistors are connected to gpio. the led current can be controlled by gpio directly. the rt9301 provides low dropout voltage and 5% maximum current matching. it also allows dimming control frequency up to 10khz. the led current can be set at different value with proper setting resistor. for typical application of gpio 1.8v/2.8v and led current 15ma/20ma, the recommended current setting resistors are showed as below table. figure 5 shows another application circuit for keypad backlight with gpio. there are 9 leds operation in parallel. a battery or a regulated power source drives the leds. each channel supports three leds. the led brightness adjustment can be set with proper setting resistor for each channel and be controlled from gpio. table 1. r set value selection gpio (v) i led (ma) r set (k ) nearest standard values for r set (k ) 15 48 47.5 1.8 20 36 36 15 101 100 2.8 20 76 75 v bat 1uf led3 led2 led1 iset1 vin iset3 iset2 rt9301 r set3 r set2 r set1 gpio gnd figure 5. application circuit for keypad backlight led3 led2 led1 gnd iset1 v bat vin iset3 iset2 r set3 r set2 gpio rt9301 r set1 1uf figure 4. application circuit for backlight with gpio thermal considerations for continuous operation, do not exceed absolute maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) - t a ) / q ja where t j(max) is the maximum operation junction temperature 125 c, t a is the ambient temperature and the q ja is the junction to ambient thermal resistance. for recommended operating conditions specification of rt9301, where t j(max) is the maximum junction temperature of the die (125 c) and t a is the maximum ambient temperature. the junction to ambient thermal resistance q ja is layout dependent. the thermal resistance q ja for tsot-23-8 is 262 c/w, and wdfn-8l 3x3 is 108 c/w on the standard jedec 51-3 single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c - 25 c) / (262 c/w) = 0.382w for tsot-23-8 packages p d(max) ) = (125 c - 25 c) / (108 c/w) = 0.926w for wdfn-8l 3x3 packages the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance q ja . for rt9301 packages, the figure 1 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed.
rt9301 8 ds9301-05 april 2011 www.richtek.com layout consideration for best performance, careful pcb layout is necessary. place all peripheral components as close to the ic as possible. a short connection is highly recommended. the following guidelines should be strictly followed when designing a pcb layout for the rt9301. 1.all the traces of led and vin pin running from chip to leds should be wide and short to reduce the parasitic connection resistance. 2.input capacitor (c in ) must be placed close to leds and connected to ground plane. the anodes of leds must be connected to c in , not battery directly. 3.current setting resistors r set should be placed as close to the chip as possible. 4.the gnd should be connected to a strong ground plane for heat sinking and noise protection. 5.the current setting resistors should be placed as close to the ic as possible. figure 6. derating curves for rt9301 packages figure 7. ecommended pcb layout of tsot-23-8 package 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 25 50 75 100 125 ambient temperature ( c) maximum power dissipation (w) single layer pcb wdfn-8l 3x3 tsot-23-8 battery ground plane all the traces of led and v in running from chip to leds should be wide and short to reduce the parasitic connection resistance. input capacitor (c in ) should be placed close to leds pin and connected to ground plane. the anodes of leds must connect to c in , not battery directly. the gnd should be connected to a strong ground plane for heat sinking and noise protection. iset3 vin gnd led3 led2 led1 iset1 iset2 5 2 3 7 8 1 4 6 battery grand plane led2 iset2 led1 led3 gnd vin iset3 iset1 7 6 5 1 2 3 4 8 all the traces of led and vin running from chip to leds should be wide and short to reduce the parasitic connection resistance. input capacitor (cin) should be placed close to leds pin and connected to ground plane. the anodes of leds must connect to cin, not battery directly. the gnd should be connected to a strong ground plane for heat sinking and noise protection. figure 8. recommended pcb layout of wdfn-8l 3x3 package
rt9301 9 ds9301-05 april 2011 www.richtek.com outline dimension tsot-23-8 surface mount package a a1 b d c h l b e dimensions in millimeters dimensions in inches symbol min max min max a 0.700 1.000 0.028 0.039 a1 0.000 0.100 0.000 0.004 b 1.397 1.803 0.055 0.071 b 0.220 0.380 0.009 0.015 c 2.591 3.000 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.585 0.715 0.023 0.028 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024
rt9301 10 ds9301-05 april 2011 www.richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 d 2.950 3.050 0.116 0.120 d2 2.100 2.350 0.083 0.093 e 2.950 3.050 0.116 0.120 e2 1.350 1.600 0.053 0.063 e 0.650 0.026 l 0.425 0.525 0.017 0.021 w-type 8l dfn 3x3 package 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. detail a pin #1 id and tie bar mark options d 1 e a3 a a1 d2 e2 l b e see detail a
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